PARTGen Input Files, PARTGen Output Files | Xilinx 8.2i specification

Chapter 4: PARTGen

PARTGen Input Files

PARTGen does not have any user input files.

PARTGen Output Files

PARTGen outputs two file types: partlist and PKG. Partlist and PKG files are produced with the -p and -v command line options. The -p option generates a terse version of the file, while the -v option generates a verbose version of the file.

Note: Partlist files are generated in both ASCII and XML formats.

Following are output file types produced by PARTGen:

•XCT file—Partlist file in ASCII format that contains detailed information about architectures and devices. See the “Partlist File” section for a detailed description of this file type.

•PKG files—ASCII formatted files that correlate IOBs with output pin names. PKG files are in XACT package format, which is a set of columns of information about the pins of a particular package. The -p option generates a three column entry describing the pins. The -v option adds five more columns of descriptive pin information.See the “PKG File” section for a detailed description of this file type.

•XML file—Partlist file in XML format.

PARTGen Options

This section describes the command line options and how they affect the behavior of

PARTGen.

–arch (Print Information for Specified Architecture)

–archarchitecture_name

The –arch option prints a list of devices, packages, and speeds for a specified architecture that has been installed.

Valid entries for architecture_name and the corresponding device product name are listed in the following table:

Table 4-1:Values for architecture_name

	architecture_name	Corresponding Device
	architecture_name	Product Name
		Product Name

	virtex	Virtex

	virtex2	Virtex-II

	virtex2p	Virtex-II Pro

	virtexe	Virtex-E

	virtex4	Virtex-4

	virtex5	Virtex-5

	spartan2	Spartan-II

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Development System Reference Guide

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.

Xilinx 8.2i manual PARTGen Input Files, PARTGen Output Files, PARTGen Options

Models: 8.2i