R

Tcl Commands for General Usage

close (close the ISE project)

The project close command closes the current ISE project. It is not necessary to specify the name of the project to close, since only one ISE project can be open at a time.

% project close

project is the name of the Xilinx Tcl command.

close is the name of the project subcommand.

Example:

% project close

Description:

In this example, the current ISE project is closed.

Tcl Return:

True if the project is closed successfully; false otherwise.

get (get project properties)

The project get command returns the value of the specified project-level property or batch application option.

%project get <option_nameproperty_name>

project is the name of the Xilinx Tcl command.

get is the name of the project subcommand.

option_name specifies the name of the batch application option you wish to get the value of. For example, Map Effort Level. Batch application options are entered as strings distinguished by double quotes (“). The exact text representation of the option in Project Navigator is required. For a complete list of project properties and options, see the “Project Properties and Options” section of this chapter.

property_name specifies the name of the property you wish to get the value of. Valid properties names are family, device, package, speed, and top.

Example:

% project get speed

 

 

Description:

In this example, the value of the speed grade that was set with the

 

project set speed command is returned.

 

 

Tcl Return:

The property value as a text string. In this example, the device speed

 

grade is returned.

 

 

get_processes (get project processes)

The project get_processes command lists the available processes for the specified instance.

% project get_processes [-instance <instance_name>]

project is the name of the Xilinx Tcl command.

get_processes is the name of the project subcommand.

-instancelimits the properties listed to only those of the specified instance. If no instance is specified, the top-level instance is used by default.

Development System Reference Guide

www.xilinx.com

65

Page 64 Page 66
Page 65
Image 65
Xilinx 8.2i Close close the ISE project, Get get project properties, Getprocesses get project processes, Project close
Page 64 Page 66

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
Top Page Image Contents