Project create and manage projects, Project clean

Chapter 3: Tcl

Table 3-4:Process Tasks

“Translate”

“Map”

“Generate Post-Map Static Timing”

“Generate Post-Map Simulation Model”

“Place & Route”

“Generate Primetime Netlist”

“Generate Post-Place & Route Static Timing”

“Generate Post-Place & Route Simulation Model”

“Generate IBIS Model”

“Back-Annotate Pin Locations”

“Generate Programming File”

project (create and manage projects)

The project command creates and manages ISE projects. A project contains all files and data related to a design. You can create a project to manage all of the design files and to enable different processes to work on the design.

%project <subcommand>

clean (remove system-generated project files)

The project clean command removes all of the temporary and system-generated files in the current ISE project. It does not remove any source files, like Verilog or VHDL, nor does it remove any user-modified files. For example, system generated design and report files like the NCD (.ncd) and map report (.mpr) are removed with the project clean command, unless they have been user-modified.

% project clean

project is the name of the Xilinx Tcl command.

clean is the name of the project subcommand.

Example:	% project clean

Description:	In this example, the current ISE project is cleaned. All temporary
	and system generated files are removed, including design and
	report files, unless these have been user-modified.

Tcl Return:

True if the project is cleaned successfully; false otherwise.

Caution! The project clean command permanently deletes all system-generated files from the current ISE project. These files include the NGD and NCD files generated by the implementation tools.

www.xilinx.com

Development System Reference Guide

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.

Xilinx 8.2i manual Project create and manage projects, Clean remove system-generated project files

Models: 8.2i