R

Partlist File

Header

The first part is a header for the entry. The format of the entry looks like the following:

part architecture family partname diename packagefilename

Following is an example for the XCV50bg256:

partVIRTEX V50bg256 NA.die v50bg256.pkg

Device Attributes

The header is followed by a list of device attributes. Not all attributes are applicable to all devices.

CLB row and column sizes: NCLBROWS=# NCLBCOLS=#

Sub-family designation: STYLE=sub_family (For example, STYLE = Virtex2)

Input registers: IN_FF_PER_IOB=#

Output registers: OUT_FF_PER_IOB=#

Number of pads per row and per column: NPADS_PER_ROW=# NPADS_PER_COL=#

Bitstream information:

Number of frames: NFRAMES=#

Number bits/frame: NBITSPERFRAME=#

The preceding bulleted items display for both the -p and -v options. The following bulleted items are displayed only when using the -v option:

Number of IOBS in device: NIOBS=#

Number of bonded IOBS: NBIOBS=#

Slices per CLB: SLICES_PER_CLB=#

For slice-based architectures, such as Virtex.

(For non-slice based architectures, assume one slice per CLB)

Flip-flops for each slice: FFS_PER_SLICE=#

Latches for each slice: CAN BE LATCHES={TRUEFALSE}

DLL blocks for Virtex, Virtex-E, Spartan-II, and Spartan-3 families, and DCMs for Virtex-II, Virtex-IIP, and Virtex-4 families that include the DLL functionality.

LUTs in a slice: LUT_NAME=name LUT_SIZE=#

Number of global buffers: NUM_GLOBAL_BUFFERS=#

(The number of places where a buffer can drive a global clock combination.)

Development System Reference Guide

www.xilinx.com

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Image 109
Xilinx 8.2i manual Header, Device Attributes, Partlist File, Part architecture family partname diename packagefilename

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.