Chapter 3: Tcl

R

set (set partition preserve property)

The partition set command assigns the partition preserve property and value for the specified partition.

%partition set <partition> preserve <value>

partition is the name of the Xilinx Tcl command.

set is the name of the partition subcommand.

partition specifies the full hierarchical name of the partition or the collection you wish to set the property for. A collection is specified using the dollar-sign syntax ($) with the name of the collection variable.

preserve is the property used to control the level of changes that can be made to the implementation of partitions that have not been re-implemented. Values for the preserve property are:

preserve {routingplacementsynthesisinherit}

routing -- Most data preservation comes from routing. When the property value is set to routing, all implementation data is preserved, including synthesis, packing, placement, and routing. Routing is the default property value.

placement --This is the second-highest property value for the preserve property. With this setting, synthesis, packing, and placement are preserved. Routing is only re- implemented if another partition requires the resources.

synthesis -- This is the lowest-level preserve property value because only the netlist, which contains synthesis information, is preserved. With this setting, packing, placement and routing are open for re-implementation; however, placement and routing are only re-implemented if another partition requires the resources.

inherit -- This value specifies that the partition inherits the same preserve property value as its parent partition. Inherit is the default setting for all child partitions. This setting is not available for top-level partitions.

Example:

% partition set /stopwatch/Inst_dcm1 preserve synthesis

 

 

Description:

In this example, the partition set command is used to specify the

 

preserve property for the Inst_dcm1 partition. The preserve value is

 

set to synthesis, which means packing, placement, and routing will

 

be re-implemented.

Tcl Return:

The value of the previous preserve property.

62

www.xilinx.com

Development System Reference Guide

Page 61 Page 63
Page 62
Image 62
Xilinx 8.2i manual Set set partition preserve property
Page 61 Page 63

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
Top Page Image Contents