Chapter 9: PAR

R

Screen Output

When PAR is running multiple jobs and is not in multi-tasking mode, output from PAR is displayed on the screen as the jobs run. When PAR is running multiple jobs in multi- tasking mode, you only see information regarding the current status of the Turns Engine. For example, when the job described in “Turns Engine Overview” is executed, the following screen output would be generated.

Starting job high_high_1 on node jupiter

Starting job high_high_2 on node mars

Starting job high_high_3 on node mercury

Starting job high_high_4 on node neptune

Starting job high_high_5 on node pluto

When one of the jobs finishes, a message similar to the following is displayed.

Finished job high_high_3 on node mercury

These messages continue until there are no jobs left to run, at which time Finished appears on your screen.

Note: For HP workstations, you are not able to interrupt the job with Ctrl+C as described following if you do not have Ctrl+C set as the escape character. To set the escape character, refer to your HP manual.

You may interrupt the job at any time by pressing Ctrl+C. If you interrupt the program, the following options are displayed:

1.Continue processing and ignore the interrupt—self-explanatory.

2.Normal program exit at next check point—allows the Turns Engine to wait for all jobs to finish before terminating. PAR is allowed to generate the master PAR output file (PAR), which describes the overall run results

When you select option 2, a secondary menu appears as follows:

a.Allow jobs to finish — current jobs finish but no other jobs start if there are any. For example, if you are running 100 jobs (–n 100) and the current jobs running are high_high_49 and high_high_50, when these jobs finish, job high_high_51 is not started.

b.Halt jobs at next checkpoint — all current jobs stop at the next checkpoint; no new jobs are started.

c.Halt jobs immediately — all current jobs stop immediately; no other jobs start

3.Exit program immediately — all running jobs stop immediately (without waiting for running jobs to terminate) and PAR exits the Turns Engine.

4.Add a node for running jobs — allows you to dynamically add a node on which you can run jobs. When you make this selection, you are prompted to input the name of the node to be added to the list. After you enter the node name, a job starts immediately on that node and a Starting job message is displayed.

192

www.xilinx.com

Development System Reference Guide

Page 191 Page 193
Page 192
Image 192
Xilinx 8.2i manual Screen Output
Page 191 Page 193

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
Top Page Image Contents