Chapter 23: XFLOW

R

•ReportDir

This section specifies the directory in which to copy the report files generated by the programs in the flow. The default directory is your working directory.

Note: You can also specify the report directory using the –rd command line option. The command line option overrides the ReportDir specified in the flow file.

•Global user-defined variables

This section allows you to specify a value for a global variable, as shown in the following example:

Variables

$simulation_output = time_sim;

End variables

The flow file contains a program block for each program in the flow. Each program block includes the following information:

•Program program_name

This line identifies the name of the program block. It also identifies the command line executable if you use an executable name as the program_name, for example, ngdbuild. This is the first line of the program block.

•Flag: ENABLED DISABLED

♦ENABLED: This option instructs XFLOW to run the program if there are options in the options file.

♦DISABLED: This option instructs XFLOW to not run the program even if there are corresponding options in the options file.

•Input: filename

This line lists the name of the input file for the program. For example, the NGDBuild program block might list design.edn.

•Triggers:

This line lists any additional files that should be read by the program. For example, the NGDBuild program block might list design.ucf.

•Exports:

This line lists the name of the file to export. For example, the NGDBuild program block might list design.ngd.

•Reports:

This line lists the report files generated. For example, the NGDBuild program block might list design.bld.

•Executable: executable_name

This line is optional. It allows you to create multiple program blocks for the same program. When creating multiple program blocks for the same program, you must enter a name other than the program name in the Program line (for example, enter post_map_trace, not trce). In the Executable line, you enter the name of the program as you would enter it on the command line (for example, trce).

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Xilinx 8.2i manual Flag Enabled Disabled, Triggers, Exports, Reports
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8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
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