R

 

Name

Type

 

Produced By

Description

 

 

 

 

 

 

 

MFP

ASCII

 

Floorplanner

Map Floorplanner File, which is

 

 

 

 

 

generated by the Floorplanner,

 

 

 

 

 

specified as an input file with the

 

 

 

 

 

–fp option. The MFP file is

 

 

 

 

 

essentially used as a guide file for

 

 

 

 

 

mapping.

 

 

 

 

 

 

 

MOD

ASCII

 

TRACE

File created with the –stamp option

 

 

 

 

 

in TRCE that contains timing

 

 

 

 

 

model information

 

 

 

 

 

 

 

MRP

ASCII

 

MAP

MAP report file containing

 

 

 

 

 

information about a technology

 

 

 

 

 

mapper command run

 

 

 

 

 

 

 

MSK

Data

 

BitGen

File used to compare relevant bit

 

 

 

 

 

locations when reading back

 

 

 

 

 

configuration data contained in an

 

 

 

 

 

operating Xilinx device

 

 

 

 

 

 

 

NAV

XML

 

NGDBuild

Report file containing information

 

 

 

 

 

about an NGDBuild run, including

 

 

 

 

 

the subprocesses run by

 

 

 

 

 

NGDBuild. From this file, the user

 

 

 

 

 

can click any linked net or instance

 

 

 

 

 

names to navigate back to the net or

 

 

 

 

 

instance in the source design.

 

 

 

 

 

 

 

NCD

Data

 

MAP, PAR, FPGA

Flat physical design database

 

 

 

 

Editor

correlated to the physical side of

 

 

 

 

 

the NGD in order to provide

 

 

 

 

 

coupling back to the user’s original

 

 

 

 

 

design

 

 

 

 

 

 

 

NCF

ASCII

 

CAE Vendor toolset

Vendor-specified logical

 

 

 

 

 

constraints files

 

 

 

 

 

 

 

NGA

Data

 

NetGen

Back-annotated mapped NCD file

 

 

 

 

 

 

 

NGC

Binary

 

XST

Netlist file with constraint

 

 

 

 

 

information.

 

 

 

 

 

 

 

NGD

Data

 

NGDBuild

Generic Database file. This file

 

 

 

 

 

contains a logical description of the

 

 

 

 

 

design expressed both in terms of

 

 

 

 

 

the hierarchy used when the design

 

 

 

 

 

was first created and in terms of

 

 

 

 

 

lower-level Xilinx primitives to

 

 

 

 

 

which the hierarchy resolves.

 

 

 

 

 

 

 

NGM

Data

 

MAP

File containing all of the data in the

 

 

 

 

 

input NGD file as well as

 

 

 

 

 

information on the physical design

 

 

 

 

 

produced by the mapping. The

 

 

 

 

 

NGM file is used for

 

 

 

 

 

back-annotation.

 

 

 

 

 

 

 

 

 

 

 

 

Development System Reference Guide

 

www.xilinx.com

375

Page 375
Image 375
Xilinx 8.2i manual MOD Ascii Trace

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.