Development System Reference Guide 149

MAP Report (MRP) File

•Configuration String Information—This section, produced with the -detail option, shows configuration strings and programming properties for special components like DCMs, BRAMS, GTs and similar components. Configuration strings for slices and IOBs marked “SECURE” are not shown.

•Additional Device Resource Counts—This section contains raw design statistics for Xilinx analysis purposes.

Note: The MAP Report is formatted for viewing in a monospace (non-proportional) font. If the text editor you use for viewing the report uses a proportional font, the columns in the report do not line up correctly.

Release 8.1i Map

Xilinx Mapping Report File for Design 'stopwatch'

Design Information

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Command Line : C:/xilinx/bin/nt/map.exe -ise c:\xilinx\projects\watchver\watchver.ise

-intstyle ise -p xc2v40-fg256-5 -cm area -pr b -k 4 -c 100 -tx off -o

stopwatch_map.ncd stopwatch.ngd stopwatch.pcf
Target Device	: xc2v40
Target Package	: fg256
Target Speed	: -5
Mapper Version	: virtex2 -- $Revision: 1.26.6.3 $
Mapped Date	: Mon Nov 01 18:11:26 2005
Design Summary
--------------
Number of errors:		0
Number of warnings:		3
Logic Utilization:
Number of Slice Flip Flops:			17	out of	512	3%
Number of 4 input LUTs:			54	out of	512	10%
Logic Distribution:
Number of occupied Slices:			29	out of	256	11%
Number of Slices containing only related logic:					29 out of 29		100%
Number of Slices containing unrelated logic:					0 out of 29		0%
Total Number 4 input LUTs:			54	out of	512	10%
Number of bonded IOBs:			27	out of	88	30%
Number of GCLKs:			1	out of	16	6%
Number of DCMs:			1	out of	4	25%
Number of RPM macros:			1
Total equivalent gate count for design: 7,487
Additional JTAG gate count for IOBs: 1,296
Peak Memory Usage:		98 MB

Development System Reference Guide

www.xilinx.com

149 8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.

Xilinx 8.2i manual Development System Reference Guide 149

Models: 8.2i

MAP Report (MRP) File

Development System Reference Guide

149

8.2i specifications