BitGen Options, Create Rawbits File

Chapter 14: BitGen

Table 14-1:BitGen Output Files

Output File Type	Output File Description

.msd	An ASCII file that contains only mask information for
	verification, including pad words and frames. No commands
	are included. Produced when -g Readback is specified.

.msk	A binary file that contains the same configuration commands as
	a .bit file, but has mask data where the configuration data is.
	This data should NOT be used to configure the device. If a mask
	bit is 0, that bit should be verified against the bit stream data. If
	a mask bit is 1, that bit should not be verified. Produced when
	the -m option is specified.

.nky	An ASCII file that contains key information for Virtex-II devices
	when encryption is desired. This file is used as an input to
	iMPACT to program the keys. Produced when -g Encrypt:Yes is
	specified.

<outname>_key.isc	Contains the data for programming the encryption keys in IEEE
	1532 format. Produced when -g IEEE 1532:Yes and -g
	Encrypt:Yes are set.

.rba	An ASCII file that contains readback commands, rather than
	configuration commands, and expected readback data where
	the configuration data would normally be.
	To produce the .rba file, the –b option must be used when –g
	Readback is specified.

.rbb	The same as the .rba file, but it is a binary file.
	Produced when –g Readback is specified.

.rbd	An ASCII file that contains only expected readback data,
	including pad words and frames. No commands are included.
	Produced when -g Readback is specified.

.rbt	An ASCII version of the bit file. Produced when the -b option is
	specified.

Note: For more information on encryption, see the Answers Database at the following web site:

http://www.xilinx.com/support.

BitGen Options

Following is a description of the command line options and how they affect the behavior of BitGen.

Note: For a complete description of the Xilinx Development System command line syntax, see “Command Line Syntax” in Chapter 1.

–b (Create Rawbits File)

Create a rawbits (file_name.rbt) file. If the –g Readback option is specified in combination with the –b option, an ASCII readback command file (file_name.rba) is also generated.

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Development System Reference Guide

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.

Xilinx 8.2i manual BitGen Options, Create Rawbits File

Models: 8.2i