Xilinx 8.2i manual Properties list available partition properties, Partition properties

Models: 8.2i

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Tcl Commands for General Usage

properties (list available partition properties)

The partition properties command displays a list of the supported properties for all partitions. You can set the value of any property with the partition set command.

% partition properties

partition is the name of the Xilinx Tcl command.

properties is the name of the partition subcommand.

Example:

% partition properties

 

 

Description:

In this example, the partition properties command is used to list the

 

properties available for all partitions in the current ISE project.

Tcl Return:

The available partition properties as a Tcl list.

For a list of partition properties and their return values, see the “set (set partition preserve property)” command in this chapter.

rerun (force partition synthesis and implementation)

The partition rerun command forces re-synthesis or re-implementation of a specified partition. If synthesis is specified, synthesis (XST), translation (NGDBuild), packing (MAP), and placement and routing (PAR) are all performed the next time the process run command is specified. If implementation is specified, translation, packing, and placement and routing are performed.

% partition rerun <partition_name> {synthesisimplementation}

partition is the name of the Xilinx Tcl command.

rerun is the name of the partition subcommand.

partition_name specifies the full hierarchical name of the partition or the collection you wish to force the re-synthesis or re-implementation of. A collection is specified using the dollar-sign syntax ($) with the name of the collection variable.

synthesis specifies re-synthesis of the partition starting with XST, then NGDBuild, MAP, and PAR.

implementation specifies re-implementing the partition starting with NGDBuild, then MAP and PAR.

Example:

% partition rerun implementation /stopwatch/Inst_dcm1

 

 

Description:

In this example, the partition rerun command forces the re-

 

implementation of the /stopwatch/Inst_dcm1 partition.

Tcl Return:

True if the command was successful; false otherwise.

Note: This command is used with the process run command, which runs the processes of the project.

Development System Reference Guide

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Xilinx 8.2i manual Properties list available partition properties, Rerun force partition synthesis and implementation

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.