Xilinx 8.2i manual Timing Verification with Trace, Net Delay Constraints, Net Skew Constraints

Chapter 12: TRACE

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Timing Verification with TRACE

TRACE checks the delays in the input NCD file against your timing constraints. If delays are exceeded, TRACE issues the appropriate timing error.

Note: Xilinx recommends limiting timing constraint values to 2 ms (milliseconds). Timing Constraint values more than 2 ms may result in bad values in the timing report.

Net Delay Constraints

When a MAXDELAY constraint is used, the delay for a constrained net is checked to ensure that the routedelay is less than or equal to the NETDELAY constraint.

routedelay ≤ netdelayconstraint

ROUTEDELAY is the signal delay between the driver pin and the load pins on a net. This is an estimated delay if the design is placed but not routed.

Any nets with delays that do not meet this condition generate timing errors in the timing report.

Net Skew Constraints

When using USELOWSKEWLINES or MAXSKEW constraints or “–skew (Analyze Clock Skew for All Clocks)”, signal skew on a net with multiple load pins is the difference between minimum and maximum load delays.

signalskew = (maxdelay - mindelay)

MAXDELAY is the maximum delay between the driver pin and a load pin.

MINDELAY is the minimum delay between the driver pin and a load pin.

Note: Register-to-register paths included in a MAXDELAY constraint report undergo a hold violation (race condition) check only for paths whose start and endpoints are registered on the same clock edge.

For constrained nets in the PCF, skew is checked to ensure that the SIGNALSKEW is less than or equal to the MAXSKEW constraint.

signalskew ≤ maxskewconstraint

If the skew exceeds the maximum skew constraint, the timing report shows a skew error.

Path Delay Constraints

When a PERIOD constraint is used, the pathdelay equals the sum of logic (component) delay, route (wire) delay, and setup time (if any), minus clock skew (if any).

pathdelay = logicdelay + routedelay + setuptime - clockskew

The delay for constrained paths is checked to ensure that the pathdelay is less than or equal to the MAXPATHDELAY constraint.

pathdelay ≤ maxpathdelayconstraint

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