R

PAR Options

–gm (Guide Mode)

–gm {exact leverage incremental}

The –gm option specifies the type of guided placement and routing PAR uses—exact, leverage, or incremental. The default is exact mode. For more information on the guide modes, see “Guided PAR”.

Note: Support for the leverage guide flow (–gm incremental), without a timing-driven map run of your design, specified with the map –timing option, will not be supported in future releases of Xilinx software.

You must specify the NCD to use as a guide file by entering a –gf option (see “–gf (Guide NCD File)”) on the PAR command line.

par -gf previous_run.ncd -gm leverage design_ncd place_and_routed.ncd design.pcf

Note: The Incremental Design flow is being deprecated and will not be available in future releases of Xilinx software. New in 8.2i are Partitions, which provide significant flexibility and functionality for design preservation. Information on Partitions can be found in the online help included in the 8.2i software and in the “TCL chapter” of this book. Incremental Design using the map and par -gm incremental option will still work in 8.2i, though it generates a warning that this flow is being removed.

–intstyle (Integration Style)

–intstyle {ise xflow silent}

The –intstyle option reduces screen output based on the integration style you are running. When using the –intstyle option, one of three modes must be specified: ise, xflow, or silent. The mode sets the way information is displayed in the following ways:

–intstyle ise

This mode indicates the program is being run as part of an integrated design environment.

–intstyle xflow

This mode indicates the program is being run as part of an integrated batch flow.

–intstyle silent

This mode limits screen output to warning and error messages only.

Note: The -intstyle option is automatically invoked when running in an integrated environment, such as Project Navigator or XFLOW.

–k (Re-Entrant Routing)

–kprevious_NCD.ncd reentrant.ncd

The –k option runs re-entrant routing. Routing begins with the existing placement and routing left in place. Re-entrant routing is useful to manually route parts of a design and then continue automatic routing, if you halted the route prematurely (for example, with Ctrl+C) and want to resume, or if you want to run additional route passes.

Development System Reference Guide

www.xilinx.com

169

Page 168 Page 170
Page 169
Image 169
Xilinx 8.2i Gm Guide Mode, Intstyle Integration Style, Re-Entrant Routing, PAR Options, Gm exact leverage incremental
Page 168 Page 170

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
Top Page Image Contents