Chapter 3: Tcl

R

Note: Some batch application options only work when other options are specified. For example, in XST, the Synthesize Constraints File option only works if the Use Synthesis Constraints File option is also specified.

Example:

% project set “Map Effort Level” high

 

 

Description:

In this example, the project set command is used to set the map effort

 

level to high. Map Effort Level is the name of the MAP option. High

 

is the value set for the option.

 

 

Tcl Return:

The previous value of the newly set option. In this example, the Tcl

 

return would be medium, if the option value was previously set to

 

medium.

 

 

Note: Batch application options are entered as strings distinguished by double quotes (“). The exact text representation of the option (or property) in the Project Navigator GUI is required. For a complete list of project properties and options, see the “Project Properties and Options” section of this chapter.

set device (set device)

The project set device command specifies the target device for the current ISE project.

Note: A list of available devices can be viewed in the Project Properties dialog box in Project Navigator, or by utilizing the unique prefixes supported by Xilinx Tcl commands. For example, type project set device V to get an error message that enumerates all Virtex devices. Optionally, you can specify the partgen –archcommand. From the Tcl prompt (%), type partgen –hfor help using this command.

% project set device <device_name>

project is the name of the Xilinx Tcl command. set device is the name of the project subcommand.

device_name specifies the target device for the current ISE project.

Example:

% project set device xc2vp2

 

 

Description:

In this example, the device for the current project is set to xc2vp2.

 

 

Tcl Return:

The previous value. In this example, the previous device setting is

 

returned.

 

 

Note: You must first use the set family command to set the device family before using this command to set the device.

set family (set device family)

The project set family command specifies the device family for the current ISE project.

Note: A list of available devices can be viewed in the Project Properties dialog box in Project Navigator, or by utilizing the unique prefixes supported by Xilinx Tcl commands. For example, type project set device V to get an error message that enumerates all Virtex devices. Optionally, you can specify the partgen –archcommand. From the Tcl prompt (%), type partgen –hfor help using this command.

%project set family <device_family_name>

project is the name of the Xilinx Tcl command.

set family is the name of the project subcommand.

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Development System Reference Guide

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Xilinx 8.2i manual Set device set device, Set family set device family, Project set Map Effort Level high
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8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
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