Xilinx 8.2i manual Physical Design Rule Check, DRC Overview

Models: 8.2i

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Chapter 8

Physical Design Rule Check

This program is compatible with the following families:

Virtex, Virtex-E

Virtex-II

Virtex-II Pro, Virtex-II Pro X

Virtex-4

Virtex-5 LX

Spartan-II, Spartan-IIE

Spartan-3, Spartan-3E, Spartan-3L

The chapter describes the physical Design Rule Check program. This chapter contains the following sections:

“DRC Overview”

“DRC Syntax”

“DRC Input File”

“DRC Output File”

“DRC Options”

“DRC Checks”

“DRC Errors and Warnings”

DRC Overview

The physical Design Rule Check, also known as DRC, comprises a series of tests to discover physical errors and some logic errors in the design. The physical DRC is run as follows:

MAP automatically runs physical DRC after it has mapped the design.

PAR (Place and Route) automatically runs physical DRC on nets when it routes the design.

BitGen, which creates a a BIT file for programming the device, automatically runs physical DRC.

You can run physical DRC from within the FPGA Editor tool. The DRC also runs automatically after certain FPGA Editor operations (for example, when you edit a logic cell or when you manually route a net). For a description of how the DRC works within the FPGA Editor, see the online help provided with the FPGA Editor GUI tool.

You can run physical DRC from the UNIX or DOS command line.

Development System Reference Guide

www.xilinx.com

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Xilinx 8.2i manual Physical Design Rule Check, DRC Overview

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.