Xfile manage project files, Add add file to project

Chapter 3: Tcl

query_items specifies the items to query. For example, -ld <number> specifies how many longest delay nets should be displayed in the report; -hf <number> specifies how many highest fanout nets should be displayed in the report. See the example below.

Example:	% timing_anlaysis run stopwatch_timing
	% timing_analysis set_query stopwatch_timing net
	“clk_net1 clk_net2” -ld 2 -hf 5

Description:	In this example, a query is set up to report 2 nets with the longest
	delay and 5 nets with the highest fanout. Delay details on the query
	items (clk_net1 and clknet_2) are reported in the detailed nets section
	of the report.
	Note: The net report is only generated after the timing_analysis run
	command is used to set up the query.

Tcl Return:

1 if the command was executed successfully; 0 otherwise.

show_settings (generate settings report)

The timing_analysis show_settings command generates a settings report based on the analysis settings.

% timing_analysis show_settings <analysis_name>

timing_analysis is the name of the Xilinx Tcl command.

show_settings is the name of the timing_analysis subcommand.

analysis_name specifies the name of the analysis previously created with the timing_analysis new command.

Example:	% timing_analysis show_settings stopwatch_timing

Description:	In this example, a settings report is generated for the
	stopwatch_timing analysis.

Tcl Return:

The name of the settings report.

xfile (manage project files)

The xfile command is used to manage all of the source files within an ISE project. Use the xfile command to add, remove, and get information on any source files in the current ISE project.

%xfile <subcommand> <file_name>

add (add file to project)

The xfile add command specifies the name of the file to add to the current ISE project. Files can be added to a project in any order.

%xfile add <file_name>

xfile is the name of the Xilinx Tcl command.

add is the name of the xfile subcommand.

www.xilinx.com

Development System Reference Guide

8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.

Xilinx 8.2i manual Xfile manage project files, Showsettings generate settings report, Example

Models: 8.2i