Appendix :

R

•NetlisterDirectory—This key specifies the directory in which to run the netlist reader. The launcher changes to this directory before running the netlist reader. It expects a DIR value or the keywords $SOURCE, $OUTPUT, or NONE, where the path to the source netlist is substituted for $SOURCE, the directory specified with the -dd option is substituted for $OUTPUT, and the current working directory is substituted for NONE. A value is optional.

•NetlisterSuccessStatus—This key specifies the return code that the netlist reader returns if it ran successfully. It expects a NUMBER value or the keyword NONE. The number may be preceded with one of the following: =, <, >, or !. A value is optional.

Value Types in Key Statements

The value types used in the preceding key statements are the following:

•RULENAME—Any series of characters except for a semicolon “;” and white space (for example, space, tab, newline).

•EXTENSION—A “.” followed by an extension that conforms to the requirements of the platform.

•FILENAME—A file name that conforms to the requirements of the platform.

•EXECUTABLE—An executable name that conforms to the requirements of the platform. It may be a full path to an executable or just an executable name. If it is just a name, then the $PATH environment variable is used to locate the executable.

•DIR—A directory name that conforms to the requirements of the platform.

•OPTIONS—Any valid string of options for the executable.

•NUMBER—Any series of digits.

•STRING—Any series of characters in double quotes.

System Rules File

The system rules are shown following. The system rules file is not an ASCII file, but for the purpose of describing the rules, the rules are described using the same syntax as in the user rules file. This syntax is described in “User Rules File”.

Note: If a rule attribute is not specified, it is assumed to have the value NONE.

#####################################################

#edif2ngd rules

#####################################################

RuleName = EDN_RULE;

NetlistFile = .edn; TargetExtension = .ngo; Netlister = edif2ngd;

NetlisterTopOptions = "[$IGNORE_LOCS] [$ADD_PADS] [$QUIET] [$AUL] {-l $LIBRARIES} $INFILE $OUTFILE";

NetlisterOptions = "-noa [$IGNORE_LOCS] {-l $LIBRARIES} $INFILE $OUTFILE";

NetlisterDirectory = NONE;

NetlisterSuccessStatus = 0;

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Development System Reference Guide

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Xilinx 8.2i manual System Rules File, Value Types in Key Statements
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8.2i specifications

Xilinx 8.2i is a significant version of the Xilinx ISE (Integrated Software Environment) that emerged in the early 2000s, marking an important milestone in the world of FPGA (Field-Programmable Gate Array) development. This version introduced a slew of advanced features, technologies, and characteristics that made it an indispensable tool for engineers and developers in designing, simulating, and implementing digital circuits.

One of the standout features of Xilinx 8.2i is its enhanced design entry capabilities. This version supports multiple design entry methods, including schematic entry, VHDL, and Verilog HDL, giving engineers the flexibility to choose their preferred approach. The integrated environment provides user-friendly graphical interfaces, making it accessible for both novice and experienced users.

Xilinx 8.2i's synthesis tools have been improved to enable more efficient design compilation and optimization. The new algorithms used in this version facilitate faster synthesis times while reducing power consumption and improving performance. Furthermore, it features support for advanced FPGA architectures, which allows for the implementation of more complex designs with greater efficiency.

The implementation tools in Xilinx 8.2i include advanced place and route capabilities, utilizing state-of-the-art algorithms for optimized resource usage. These tools enable designers to make better use of FPGA resources, ensuring that designs fit within the constraints of the target device while maximizing performance.

Another key characteristic of Xilinx 8.2i is its extensive support for various Xilinx devices such as the Spartan, Virtex, and CoolRunner series. This compatibility ensures that developers can leverage the powerful features of these FPGA families, including high-speed transceivers and DSP slices.

Xilinx 8.2i also places a strong emphasis on simulation and verification. The version integrates with various simulation tools, allowing for thorough testing of the designs before implementation. This reduces the risk of errors and ensures that the final product meets specifications.

In addition, this version includes support for design constraints, enabling engineers to specify timing, area, and other critical design parameters. By accommodating constraints, Xilinx 8.2i helps in achieving reliable and efficient designs tailored to project needs.

In summary, Xilinx 8.2i is a robust software development tool that enhances the design process for FPGAs. Its comprehensive features, including multiple design entry options, advanced synthesis and implementation tools, extensive device support, and strong simulation capabilities, make it a valuable resource for engineers and developers striving for innovation in digital design.
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