R

Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceivers

Closely Related Clock Sources

Case 1

Figure 8-2illustrates a simplified diagram of a common situation where the core, in SGMII mode, is interfaced to an external PHY device. A common oscillator source is used for both the FPGA and the external PHY.

SGMII Link

FPGA

 

 

 

Ethernet 1000BASE-X

 

 

 

PCS/PMA or SGMII

RocketIO

 

 

LogiCORE

 

 

10 BASE-T

 

 

TXP/TXN

 

 

100BASE-T

 

 

 

1000BASE-T

 

Rx

 

PHY

 

Elastic

RXP/RXN

 

Buffer

 

 

125MHz -100ppm

 

 

Figure 8-2:SGMII Implementation using Shared Clock Sources

Twisted

Copper

Pair

If the PHY device sources the receiver SGMII stream synchronously from the shared oscillator (check PHY data sheet), the RocketIO will receive data at exactly the same rate as that used by the core. The receiver elastic buffer will neither empty nor fill, having the same frequency clock on either side.

In this situation, the receiver elastic buffer will not under or overflow, and the elastic buffer implementation in the RocketIO should be used to save logic resources.

Case 2

Consider again the case illustrated in Figure 8-1with the following exception: assume that the clock sources used are both 50 ppm. Now the maximum frequency difference between the two devices is 100 ppm. It can be shown that this translates into a full clock period difference every 10000 clock periods, resulting in a requirement for 16 FIFO entries above and below the half-full point. This provides reliable operation with the RocketIO Rx Elastic Buffers. Again, however, check the PHY data sheet to ensure that the PHY device sources the receiver SGMII stream synchronously to its reference oscillator.

RocketIO Logic using the RocketIO Rx Elastic Buffer

When the RocketIO Rx Elastic Buffer implementation is selected, the connections between the core and the RocketIO as well as all clock circuitry in the system are identical to the 1000BASE-X implementation. For a detailed explanation, see Chapter 7, “1000BASE-X with RocketIO Transceivers.”

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Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

 

 

UG155 March 24, 2008

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Xilinx 1000BASE-X manual RocketIO Logic using the RocketIO Rx Elastic Buffer, Closely Related Clock Sources