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R
Chapter 7: 1000BASE-X with RocketIO Transceivers
DCM BUFG
CLKIN CLK0
FB CLKDV
BUFG
userclk2 (125MHz)
userclk (62.5MHz)
brefclkp IBUFGDS
IPAD
IPADclkin
brefclkn (125MHz)
component_name_block (Block Level from example design)
Ethernet
PCS/PMA or SGMII
LogiCORE
userclk
userclk2
rxchariscomma
rxbufstatus[1:0]
rxcharisk
rxdisperr
rxdata[7:0]
rxrundisp
rxclkcorcnt[2:0]
powerdown
txchardispmode
txchardispval
txcharisk
txdata[7:0]
LOGIC
SHIM
rocketio_wrapper_gtp
rocketio_wrapper_gtp_tile
GTP
RocketIO
(0)
CLKIN
REFCLKOUT
TXUSRCLK0
TXUSRCLK20
RXUSRCLK0
RXUSRCLK20
RXCHARISCOMMA0
RXBUFERR0
RXCHARISK0
RXDISPERR0
RXDATA[07:0]
RXRUNDISP0 RXCLKCORCNT[2:0]
POWERDOWN0
TXCHARDISPMODE0
TXCHARDISPVAL0
TXCHARISK0
TXDATA[07:0]
enablealign
RXENMCOMMAALIGN0
RXENPCOMMAALIGN0
Figure 7-4: 1000BASE-X Connection to Virtex-5 GTX Transceivers
86 | www.xilinx.com | Ethernet |
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| UG155 March 24, 2008 |