Management Registers
Table 9-3: Control Register (Register 0) (Continued)
R
Bit(s) | Name |
| Description | Attributes | Default |
| Value | ||||
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0.13 | Speed | Always returns a 0 for this bit. | Returns 0 | 0 | |
| Selection | Together with bit 0.6, speed selection |
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| (LSB) | of 1000 Mbps is identified |
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0.12 | Auto- | 1 | = Enable | Read/write | 1 |
| Negotiation | Process |
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| Enable | 0 | = Disable |
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| Process |
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0.11 | Power Down | 1 | = Power down | Read/ write | 0 |
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| 0 | = Normal operation |
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| With the PMA option, when set to ’1’ |
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| the RocketIO transceiver is placed in |
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| a |
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| reset (see bit 0.15) to clear. |
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| With the TBI version this register bit |
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| has no effect. |
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0.10 | Isolate | 1 | = Electrically Isolate PHY from | Read/write | 1 |
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| GMII |
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| 0 | = Normal operation |
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0.9 | Restart Auto- | 1 | = Restart | Read/write | 0 |
| Negotiation | Process | Self clearing |
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| 0 | = Normal Operation |
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0.8 | Duplex Mode | Always returns a ‘1’ for this bit to | Returns 1 | 1 | |
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| signal |
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0.7 | Collision Test | Always returns a ‘0’ for this bit to | Returns 0 | 0 | |
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| disable COL test. |
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0.6 | Speed | Always returns a ‘1’ for this bit. | Returns 1 | 1 | |
| Selection | Together with bit 0.13, speed |
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| (MSB) | selection of 1000 Mbps is identified. |
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0.5 | Unidirectiona | Enable transmit regardless of | Read/ write | 0 | |
| l Enable | whether a valid link has been |
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| established. |
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0.4:0 | Reserved | Always return 0s, writes ignored. | Returns 0s | 00000 | |
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Ethernet | www.xilinx.com | 121 |