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Chapter 9: Configuration and Status
Register 16: SGMII Auto-Negotiation Interrupt Control
MDIO Register 16: SGMII Auto-Negotiation Interrupt Control
15 | 2 | 1 | 0 | |
Reg 16 |
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| RESERVED |
| INTERRUPT | INTERRUPT |
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| STATUS | ENABLE |
Table 9-28: SGMII Auto-Negotiation Interrupt Control (Register 16)
Bit(s) | Name |
| Description | Attributes | Default Value |
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16.15:2 | Reserved | Always return 0s | returns 0s | 00000000000000 | |
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16.1 | Interrupt | 1 | = Interrupt is asserted | read/ | 0 |
| Status | 0 | = Interrupt is not asserted | write |
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| If the interrupt is enabled, this bit is |
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| asserted on completion of an Auto- |
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| Negotiation cycle across the SGMII |
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| link; it is only cleared by writing ‘0’ |
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| to this bit. |
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| If the Interrupt is disabled, the bit is |
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| set to ‘0.’ |
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| NOTE: The an_interrupt port of the |
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| core is wired to this bit. |
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16.0 | Interrupt | 1 | = Interrupt enabled | read/ | 1 |
| Enable | 0 | = Interrupt disabled | write |
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144 | www.xilinx.com | Ethernet |
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| UG155 March 24, 2008 |