R
Chapter 9: Configuration and Status
Register 15: SGMII Extended Status
MDIO Register 15: SGMII Extended Status
15 | 14 | 13 | 12 | 11 | 0 | |
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Reg 15 |
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| RESERVED | ||||
| FULL DUPLEX | HALF DUPLEX | FULL DUPLEX | HALF DUPLEX |
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Table 9-34: SGMII Extended Status Register (Register 15)
Bit(s) | Name | Description | Attributes | Default Value |
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15.15 | Always returns a ‘1’ for this bit since | returns 1 | 1 | |
| Full Duplex |
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| supported |
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15.14 | Always returns a ‘0’ for this bit since | returns 0 | 0 | |
| Half Duplex |
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| supported |
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15.13 | Always returns a ‘0’ for this bit since | returns 0 | 0 | |
| Full Duplex |
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| supported |
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15.12 | Always returns a ‘0’ for this bit since | returns 0 | 0 | |
| Half Duplex |
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| supported |
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15:11:0 | Reserved | Always return 0s | returns 0s | 000000000000 |
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Both 1000BASE-X and SGMII Standards
Table
When this Register is configured to perform the
When this Register is configured to perform the SGMII standard, Registers 0 to 16 should be interpreted as per “SGMII Standard Using the Optional
150 | www.xilinx.com | Ethernet |
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| UG155 March 24, 2008 |