R

Chapter 7: 1000BASE-X with RocketIO Transceivers

brefclkp

IBUFGDS

IPAD

 

 

 

 

 

 

IPAD

 

 

clkin

 

 

BUFG

 

brefclkn

 

(125MHz)

userclk2 (125MHz)

component_name_block (Block Level from example design)

Ethernet 1000BASE-X

PCS/PMA or SGMII

LogiCORE

userclk

userclk2

rxchariscomma

rxbufstatus[1:0]

rxcharisk

rxdisperr

rxdata[7:0]

rxrundisp

rxclkcorcnt[2:0]

powerdown

txchardispmode

txchardispval

txcharisk

txdata[7:0]

rocketio_wrapper_gtp

rocketio_wrapper_gtp_tile

Virtex-5

GTP

RocketIO

(0)

CLKIN

REFCLKOUT

TXUSRCLK0

TXUSRCLK20

RXUSRCLK0

RXUSRCLK20

RXCHARISCOMMA0

RXBUFERR0

RXCHARISK0

LOGIC

SHIMRXDISPERR0 RXDATA[07:0]

RXRUNDISP0

RXCLKCORCNT[2:0]

POWERDOWN0

TXCHARDISPMODE0

TXCHARDISPVAL0

TXCHARISK0

TXDATA[07:0]

enablealign

RXENMCOMMAALIGN0

RXENPCOMMAALIGN0

Figure 7-3:1000BASE-X Connection to Virtex-5 GTP Transceivers

84

www.xilinx.com

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

 

 

UG155 March 24, 2008

Page 84
Image 84
Xilinx manual 31000BASE-X Connection to Virtex-5 GTP Transceivers