Management Registers

Register 15: SGMII Extended Status

MDIO Register 15: SGMII Extended Status

15

14

13

12

11

0

 

 

 

 

 

 

Reg 15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1000BASE-X

1000BASE-X

1000BASE-T

1000BASE-T

 

RESERVED

 

FULL DUPLEX

HALF DUPLEX

FULL DUPLEX

HALF DUPLEX

 

 

R

Table 9-27:SGMII Extended Status Register (Register 15)

Bit(s)

Name

Description

Attributes

Default Value

 

 

 

 

 

15.15

1000BASE-X

Always returns a ‘1’ for this bit since

returns 1

1

 

Full Duplex

1000BASE-X Full Duplex is

 

 

 

 

supported

 

 

 

 

 

 

 

15.14

1000BASE-X

Always returns a ‘0’ for this bit since

returns 0

0

 

Half Duplex

1000BASE-X Half Duplex is not

 

 

 

 

supported

 

 

 

 

 

 

 

15.13

1000BASE-T

Always returns a ‘0’ for this bit since

returns 0

0

 

Full Duplex

1000BASE-T Full Duplex is not

 

 

 

 

supported

 

 

 

 

 

 

 

15.12

1000BASE-T

Always returns a ‘0’ for this bit since

returns 0

0

 

Half Duplex

1000BASE-T Half Duplex is not

 

 

 

 

supported

 

 

 

 

 

 

 

15:11:0

Reserved

Always return 0s

returns 0s

000000000000

 

 

 

 

 

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

www.xilinx.com

143

UG155 March 24, 2008

Page 143
Image 143
Xilinx 1000BASE-X manual Mdio Register 15 Sgmii Extended Status, 27SGMII Extended Status Register Register