Xilinx 1000BASE-X Designing with the Core

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 45
UG155 March 24, 2008
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Chapter 4
Designing with the Core
This chapter provides information about creating your own designs using the Ethernet
1000BASE-X PCS/PMA or SGMII core. Design guidelines, as well as the variety of
implementations presented, are based on the example design delivered with the core. See
the Xilinx Ethernet 1000BASE-X PCS/PMA or SGMII Getting Started Guide for information
about the example design delivered with the core.
Note that not all implementations require all of the design steps defined in this chapter.
Carefully follow the provided logic design guidelines to ensure success.
Design Overview
An HDL example design built around the core is provided through the CORE Generator
and allows for a demonstration of core functionality using either a simulation package or
in hardware if placed on a suitable board. Four implementations of the core, based on the
provided example design, are illustrated in the following sections.
•“1000BASE-X Standard Using RocketIO Transceiver Example Design”
•“1000BASE-X Standard with TBI Example Design”
•“SGMII Standard Using a RocketIO Transceiver Example Design”
•“SGMII Standard with TBI Transceiver Example Design”