Management Registers

Table 9-4:Status Register (Register 1) (Continued)

R

Bit(s)

Name

Description

Attributes

Default

Value

 

 

 

 

 

 

 

 

 

1.4

Remote Fault

1 = Remote fault condition detected

Read only

0

 

 

0 = No remote fault condition detected

Self-

 

 

 

 

clearing

 

 

 

 

on read

 

 

 

 

 

 

1.3

Auto- Negotiation

Always returns a ‘1’ for this bit to indicate

Returns 1

1

 

Ability

that the PHY is capable of Auto-

 

 

 

 

Negotiation.

 

 

 

 

 

 

 

1.2

Link Status1

1 = Link is up

Read only

0

 

 

0 = Link is down

Self

 

 

 

Latches '0' if Link Status goes down.

clearing

 

 

 

on read

 

 

 

Clears to current Link Status on read.

 

 

 

 

 

 

 

See table note for Link Status behavior.

 

 

 

 

 

 

 

1.1

Jabber Detect

Always returns a ‘0’ for this bit since

Returns 0

0

 

 

Jabber Detect is not supported.

 

 

 

 

 

 

 

1.0

Extended Capability

Always returns a ‘0’ for this bit since no

Returns 0

0

 

 

extended register set is supported.

 

 

 

 

 

 

 

1.When high, the link is valid: synchronization of the link has been obtained and Auto-Negotiation (if present and enabled) has completed.

When low, a valid link has not been established. Either link synchronization has failed or Auto-Negotiation (if present and enabled) has failed to complete.

Regardless of whether Auto-Negotiation is enabled or disabled, there can be some delay to the deassertion of this signal following the loss of synchronization of a previously successful link. This is due to the Auto-Negotiation state machine which requires that synchronization is lost for an entire link timer duration before changing state. For more information, see the 802.3 specification.

Registers 2 and 3: PHY Identifiers

Registers 2 and 3: PHY Identifiers

15

Reg 2

15

10

9

Reg 3

 

 

 

 

 

 

 

 

 

 

 

UNIQUE ID

ORGANIZE

 

ORGANIZE

UNIQUE ID

MAUFACTURER

MODEL NO

0

4

3

0

 

 

REVISION NO

 

 

 

 

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

www.xilinx.com

123

UG155 March 24, 2008

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Image 123
Xilinx 1000BASE-X manual Registers 2 and 3 PHY Identifiers, Management Registers 4Status Register Register