Schedule of Figures

Chapter 2: Core Architecture

Figure 2-1:Functional Block Diagram Using RocketIO Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 2-2:Functional Block Diagram with a Ten-Bit Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 2-3:Component Pinout Using RocketIO Transceiver

with PCS Management Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 2-4:Component Pinout Using RocketIO Transceiver

without PCS Management Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 2-5:Component Pinout Using the Ten-Bit Interface

with PCS Management Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 2-6:Component Pinout Using Ten-Bit Interface

without PCS Management Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 2-7:Component Pinout with the Dynamic Switching Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Chapter 3: Generating and Customizing the Core

Figure 3-1:Core Customization Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 3-2:1000BASE-X Standard Options Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 3-3:SGMII/Dynamic Standard Switching Options Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 3-4:RocketIO Tile Configuration Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Chapter 4: Designing with the Core

Figure 4-1:1000BASE-X Standard Using a RocketIO Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Figure 4-2:Example Design 1000BASE-X Standard Using TBI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Figure 4-3:Example Design Performing the SGMII Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Figure 4-4:Example Design Performing the SGMII Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Chapter 5: Using the Client-side GMII Data Path

Figure 5-1:GMII Normal Frame Transmission. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 5-2:GMII Error Propagation Within a Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 5-3:GMII Normal Frame Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 5-4:GMII Normal Frame Reception with Carrier Extension. . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Figure 5-5:GMII Frame Reception with Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Figure 5-6:False Carrier Indication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Figure 5-7:status_vector[4:2] timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Figure 5-8:GMII Frame Transmission with RocketIO Transceiver CRC Logic Enabled . . . . . . . . 58

Figure 5-9:GMII Frame Reception with the RocketIO Transceiver CRC Logic Enabled . . . . . . . . 58

Figure 5-10:GMII Frame Transmission at 1 Gbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Figure 5-11:GMII Data Transmission at 100 Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Figure 5-12:GMII Frame Reception at 1 Gbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Figure 5-13:GMII Data Reception at 100 Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Figure 5-14:GMII Transmitter Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Figure 5-15:External GMII Transmitter Logic for Spartan-3, Spartan-3E and

Spartan-3A Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Figure 5-16:External GMII Transmitter Logic for Virtex-4 Devices. . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 5-17:External GMII Transmitter Logic for Virtex-5 Devices. . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Figure 5-18:External GMII Receiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

www.xilinx.com

UG155 March 24, 2008

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Xilinx 1000BASE-X manual Schedule of Figures, 1Functional Block Diagram Using RocketIO Transceiver