DMA Controller

Figure 5-5. Little Endian Transfers

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5.1.8Trailing Bytes

The DMA normally transfers bytes equal to the transaction size specified by DCMD[SIZE]. As the descriptor nears the end its data, the number of trailing bytes in the DCMD[LENGTH] field may be smaller than the transfer size. The DMA can transfer the exact number of trailing bytes if the DCMD[FLOWSRC] and DCMD[FLOWTRG] bits are both 0 or if it receives a corresponding request from a peripheral or companion chip.

Trailing bytes must be considered in the following cases:

Memory-to-Memory Moves: The DMA transfers a number bytes equal to the smaller of DCMD[LENGTH] or DCMD[SIZE].

Companion-Chip Related Transfers: The companion-chip must assert the request if the DMAC must handle the trailing bytes. If the request is asserted, the DMA transfers a number of bytes equal to the smaller of DCMD[LENGTH] or DCMD[SIZE].

Memory to Internal Peripheral Transfers: Most peripherals send a request for trailing bytes during memory to internal peripheral transfers. Refer to the appropriate section in this document for details of a peripheral’s operation. The DMA transfers bytes equal to the smaller of DCMD[LENGTH] or DCMD[SIZE].

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Intel® PXA255 Processor Developer’s Manual

Page 160
Image 160
Intel PXA255 manual Trailing Bytes, Little Endian Transfers