Memory Controller

Figure 6-28. Expansion Card External Logic for a Two-Socket Configuration

PXA255

Processor

D(15:0)

GPIO(w)

GPIO(x)

GPIO(y)

GPIO(z)

PSKTSEL

MA(25:0) nPREG

nPCE(1:2)

nPOE, nPWE nPIOW, nPIOR

nPWAIT

nPIOIS16

DIR OE#

nPCEx

nPOE

DIR OE#

 

nPIOR

 

nPCEx

 

6

6

6

Socket 0

D(15:0)

CD1#

CD2#

RDY/BSY#

A(25:0)

REG#

CE(1:2)#

OE#

WE#

IOR#

IOW#

WAIT#

IOIS1616#

Socket 1

D(15:0)

CD1#

CD2#

RDY/BSY#

A(25:0)

REG#

CE(1:2)#

OE#

WE#

IOR#

IOW#

WAIT#

IOIS1616#

6-68

Intel® PXA255 Processor Developer’s Manual

Page 250
Image 250
Intel PXA255 manual Socket