LCD Controller

Table 7-10. LDCMDx Bit Definitions

 

 

 

Physical Address

 

 

 

 

 

LDCMD0

 

 

 

 

 

 

 

LCD Controller

 

 

 

 

 

 

channel 0: 0x4400_020C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LDCMD1

 

 

 

 

 

 

 

 

 

 

 

 

 

channel 1: 0x4400_021C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

reserved

Reset X X X X X

PAL

reserved

 

 

 

0 X X X

SOFINT

EOFINT

0

0

LEN

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Bits

Name

Description

 

 

 

31:27

reserved

 

 

 

 

 

Load Palette:

26

PAL

0 = DMA in progress is not the palette buffer.

1 = DMA in progress is the palette buffer.

 

 

 

 

PAL must not be set in LDCMD1.

 

 

 

25:23

reserved

 

 

 

 

 

Start of Frame Interrupt:

22

SOFINT

0 = Do not set the SOF interrupt bit in the LCD status register when starting a new frame.

1 = Set the start of frame (SOF) interrupt bit in the LCD status register when starting a new

 

 

 

 

frame (after loading the frame descriptor).

 

 

 

 

 

End of Frame Interrupt:

21

EOFINT

0 = Do not set the EOF interrupt bit in the LCD status register when finished fetching the

last word of this frame.

 

 

1 = Set the end of frame (EOF) interrupt bit in the LCD status register when finished

 

 

fetching the last word of this frame.

 

 

 

 

 

Length of transfer in bytes:

20:0

LEN

The two lowest bits [1:0] are part of the length calculation but must always be zero for

proper memory alignment.

 

 

 

 

LEN = 0 is illegal.

 

 

 

7-36

Intel® PXA255 Processor Developer’s Manual

Page 300
Image 300
Intel PXA255 manual LDCMDx Bit Definitions, LDCMD0, LDCMD1, Pal, Sofint Eofint LEN