System Architecture

Each interrupt goes through the Interrupt Controller Mask Register and then the Interrupt Controller Level Register directs the interrupt into either the IRQ or FIQ. If an interrupt is taken, the software may read the Interrupt Controller Pending Register to identify the source. After it identifies the interrupt source, software is responsible for servicing the interrupt and clearing it in the source unit before exiting the service routine.

Note: Clearing interrupts may take a delay. To allow the status bit to clear before returning from an interrupt service routine (ISR), clear the interrupt early in the routine.

2.6Reset

The processor can be reset in any of three ways: Hardware, Watchdog, and GPIO resets. Each is described in more detail in Section 3.4, “Resets and Power Modes” on page 3-6.

Hardware reset results from asserting the nRESET pin and forces all units into reset state.

Watchdog reset results from a time-out in the OS Timer and may be used to recover from runaway code. Watchdog reset is disabled by default and must be enabled by software.

GPIO reset is a “soft reset” that is less destructive than Hardware and Watchdog resets.

Each type of reset affects the state of the processor pins. Table 2-4shows each pin’s state after each type of reset.

Leaving Sleep Mode causes a Sleep Mode reset. Unlike other resets, Sleep Mode resets do not change the state of the pins.

The Reset Controller Status Register (RCSR) contains information on the type of reset, including Sleep Mode resets.

Table 2-4. Effect of Each Type of Reset on Internal Register State (Sheet 1 of 2)

Unit

Sleep Mode

GPIO Reset

Watchdog Reset

Hard Reset

 

 

 

 

 

Core

reset

reset

reset

reset

 

 

 

 

 

Memory Controller

reset

preserved

reset

reset

 

 

 

 

 

LCD Controller

reset

reset

reset

reset

 

 

 

 

 

DMA Controller

reset

reset

reset

reset

 

 

 

 

 

Full Function UART

reset

reset

reset

reset

 

 

 

 

 

Bluetooth UART

reset

reset

reset

reset

 

 

 

 

 

Standard UART

reset

reset

reset

reset

 

 

 

 

 

Hardware UART

reset

reset

reset

reset

 

 

 

 

 

I2C

reset

reset

reset

reset

I2S

reset

reset

reset

reset

AC97

reset

reset

reset

reset

 

 

 

 

 

USB

reset

reset

reset

reset

 

 

 

 

 

ICP

reset

reset

reset

reset

 

 

 

 

 

RTC

preserved

preserved

reset (except RTTR)

reset

 

 

 

 

 

OS Timer

reset

reset

reset

reset

 

 

 

 

 

2-6

Intel® PXA255 Processor Developer’s Manual

Page 36
Image 36
Intel PXA255 manual Unit Sleep Mode Gpio Reset Watchdog Reset Hard Reset, Usb, Icp, Rtc