DMA Controller

5.2.1.1Using Flow-Through DMA Read Cycles to Service Internal Peripherals

A flow-through DMA read for an internal peripheral begins when the internal peripheral sends a request, via the PREQ bus, to a DMAC channel that is running and configured for a flow-through read. The number of bytes to be transferred is specified with DCMDx[SIZE]. When the request is the highest priority request, the following process begins:

1.The DMAC sends the memory controller a request to read the number of bytes addressed by DSADRx[31:0] into a 32-byte staging buffer in the DMAC.

2.The DMAC transfers the data to the I/O device addressed in DTADRx[31:0]. DCMD[WIDTH] specifies the width of the internal peripheral to which the data is transferred.

3.At the end of the transfer, DSADRx is increased by the smaller value of DCMDx[LENGTH] and DCMD[SIZE]. DCMDx[LENGTH] is decreased by the same value.

For a flow-through DMA read to an internal peripheral, use the following settings for the DMAC register bits:

DSADR[SRCADDR] = external memory address

DTADR[TRGADDR] = internal peripheral’s address

DCMD[INCSRCADDR] = 1

DCMD[FLOWSRC] = 0

DCMD[FLOWTRG] = 1

5.2.1.2Using Flow-Through DMA Write Cycles to Service Internal Peripherals

A flow-through DMA write for an internal peripheral begins when the internal peripheral sends a request, via the PREQ bus, to a DMAC channel that is running and configured for a flow-through write. The number of bytes to be transferred are specified with DCMDx[SIZE]. When the request is the highest priority request, the following process begins:

1.The DMAC transfers the required number of bytes from the I/O device addressed by DSADRx[31:0] to the DMAC write buffer.

2.The DMAC transfers the data to the memory controller via the internal bus. DCMD[WIDTH] specifies the width of the internal peripheral to which the transfer is being made.

3.At the end of the transfer, DTADRx is increased by the smaller value of DCMDx[LENGTH] and DCMD[SIZE]. DCMDx[LENGTH] is decreased by the same number.

For a flow-through DMA write to an internal peripheral, use the following settings for the DMAC register bits:

DSADR[SRCADDR] = internal peripheral address

DTADR[TRGADDR] = external memory address

DCMD[INCTRGADDR] = 1

DCMD[FLOWSRC] = 1

DCMD[FLOWTRG] = 0

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Intel® PXA255 Processor Developer’s Manual

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Intel PXA255 manual Dcmdincsrcaddr = Dcmdflowsrc = Dcmdflowtrg =