MultiMediaCard Controller

Figure 15-4. SPI Mode Operation Without Data Token

from host to card

MMCMD Command

 

from host to

from card to

from card to

card

host

host

 

 

 

 

 

 

 

 

 

Command

 

 

 

 

 

MMDAT Response

Response

Busy

Figure 15-5. SPI Mode Read Operation

from host to

from card to

data from card to

Next

 

MMCMD Command

MMDAT

Response

Data Block

CRC

Command

Figure 15-6. SPI Mode Write Operation

from host to

MMCMD Command

MMDAT

from card to

data from host to

new

Data response

 

 

 

Data Block Command

Response

 

Data Response

Busy

 

 

 

 

Note: One- and three-byte data transfers are not supported with this controller. Data transfers of 10 or more bytes are supported for stream writes only.

Refer to The MultiMediaCard System Specification for detailed information on MMC and SPI modes of operation.

15.2MMC Controller Functional Description

The software must read and write the MMC controller registers and FIFOs to initiate communication to a card.

15-4

Intel® PXA255 Processor Developer’s Manual

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Image 508
Intel PXA255 manual MMC Controller Functional Description, Crc