Intel PXA255 manual Run Mode, Completing Gpio Reset, Entering Turbo Mode

Clocks and Power Manager

previously programmed values, so the processor enters and exits GPIO Reset with the same clock configurations. All pins except the oscillator and Memory Controller pins return to their reset conditions and the nBATT_FAULT and nVDD_FAULT pins are ignored.

GPIO Reset does not reset the Memory Controller Configuration registers. This creates the possibility that the contents of external memories may be preserved if the external memories are properly configured before GPIO Reset is entered. To preserve SDRAM contents during a GPIO Reset, software must correctly configure the Memory Control and the time spent in GPIO Reset must be shorter than the SDRAM refresh interval. The amount of time spent in GPIO Reset depends on the CPU’s mode before GPIO Reset. See Section 6, “Memory Controller” for details.

Refer to Table 2-6, “Pin & Signal Descriptions for the PXA255 Processor” for the states of all the PXA255 processor pins during GPIO reset and other resets.

3.4.3.3Completing GPIO Reset

GPIO Reset immediately reverts to Hardware Reset when the nRESET pin is asserted. Otherwise, the completion sequence for GPIO Reset is:

1.The GPIO Reset Source is deasserted because the internal reset has propagated to the GPIO Controller and its registers, which are set back to their reset states.

2.The nRESET_OUT pin is deasserted.

3.The normal boot-up sequence begins. All processor units except the Real Time Clock, parts of the Clocks and Power Manager, and the Memory Controller return to their predefined reset conditions. Software must examine the RCSR to determine the cause for the reset.

3.4.4Run Mode

Run Mode is the processor’s normal operating mode. All power supplies are enabled and all functionally enabled clocks are running. Run Mode is entered after any power mode, power sequence, or reset completes its sequence. Run Mode is exited when any other power mode, power sequence, or reset begins.

3.4.5Turbo Mode

Turbo Mode allows the user to clock the processor core at a higher frequency during peak processing requirements. It allows a synchronous switch in frequencies without disrupting the Memory Controller, LCD Controller, or any peripheral.

3.4.5.1Entering Turbo Mode

Turbo Mode is invoked when software sets the TURBO bit in the Clock Config (CCLKCFG) Register (See Section 3.7.1). After software sets the TURBO bit, the CPU waits for all instructions currently in the pipeline to complete. When the instructions are completed, the CPU resumes operation at the higher Turbo Mode Frequency.

Software can set or clear other bits in the CCLKCFG in the same write that sets the TURBO bit. The other bits in the register take precedence over Turbo Mode, so, if another bit is set, that mode’s sequence is followed before the CPU enters Turbo Mode. When the CPU exits the other mode, it enters either Run or Turbo Mode, based on the state of the CCLKCFG [TURBO] bit.

Intel® PXA255 Processor Developer’s Manual 3-9