Intel PXA255 Servicing Companion Chips and External Peripherals, Unit Function Fifo Address Width

DMA Controller

Table 5-5. DMA Quick Reference for Internal Peripherals (Sheet 2 of 2)

Unit	Function	FIFO Address	Width	DCMD.	Burst Size	Source
				Width		or	DRCMR
			(bytes)		(bytes)
				(binary)		Target
	endpoint 1	0x4060_0100	1	01	32	Target	0x4000_0164
	transmit
	endpoint 2	0x4060_0180	1	01	32	Source	0x4000_0168
	receive
	endpoint 3	0x4060_0200	1	01	32	Target	0x4000_016C
	transmit
	endpoint 4	0x4060_0400	1	01	32	Source	0x4000_0170
	receive
	endpoint 6	0x4060_0600	1	01	32	Target	0x4000_0178
	transmit
	endpoint 7	0x4060_0680	1	01	32	Source	0x4000_017C
	receive
USB
	endpoint 8	0x4060_0700	1	01	32	Target	0x4000_0180
	transmit
	endpoint 9	0x4060_0900	1	01	32	Source	0x4000_0184
	receive
	endpoint 11	0x4060_0B00	1	01	32	Target	0x4000_018C
	transmit
	endpoint 12	0x4060_0B80	1	01	32	Source	0x4000_0190
	receive
	endpoint 13	0x4060_0C00	1	01	32	Target	0x4000_0194
	transmit
	endpoint 14	0x4060_0E00	1	01	32	Source	0x4000_0198
	receive

5.2.3Servicing Companion Chips and External Peripherals

Companion chips and external peripherals can be serviced with flow-through transfers. The DMAC provides DMA Request to Channel Map Registers (DRCMRx) that contain four bits that assign a channel number for each of the possible DMA requests. The companion-chip requests are DREQ[1:0]. The DREQ signal can be mapped to one of the 16 available channels. The DREQ signals are sampled on every peripheral clock (PCLK) and if any of the DREQ signals are sampled non-zero, a lookup is performed on the corresponding bits in the DRCMRx. This allows requests to one of the channels to be mapped. If the external peripheral address is in the DSADR, the DCMDx[FLOWSRC] bit must be set to a 1. If the external peripheral address is in the DTADR, the DCMDx[FLOWTRG] bit must be set to a 1. This allows the processor to wait for the request before it initiates the transfer.

If DCMDx[IRQEN] is set to a 1, a DMA interrupt can be requested at the end of the last cycle associated with the byte that caused DCMDx[LENGTH] to decrease from a 1 to a 0.

5-14 Intel® PXA255 Processor Developer’s Manual