LCD Controller

Figure 7-12. Passive Mode Start-of-Frame Timing

 

 

ENB set to 1

 

 

L_FCLK

VSP = 0

 

VSW = 1

 

HSW = 1

L_LCLK

 

 

HSP = 0

BLW = 0

ELW = 0

L_PCLK

 

 

PCP = 1

PPL = 319

 

 

 

LDD[3:0] Line 0 Data Line 1 Data Line 2 Data

ENB - LCD Enable

HSP - Horizontal Sync Polarity

0

- LCD is disabled

0

- Line clock is active high, inactive low

1

- LCD is enabled

1

- Line clock is active low, inactive high

VSP - Vertical Sync Polarity

PCP - Pixel Clock Polarity

0

- Frame clock is active high, inactive low 0

- Pixels sampled from data pins on rising edge of clock

1

- Frame clock is active low, inactive high 1

- Pixels sampled from data pins on falling edge of clock

For PCP = 0 the L_PCLK waveform is inverted, but the timing is identical.

VSW = Vertical Sync Pulse Width - 1

HSW = Horizontal Sync (Line Clock) Pulse Width - 1

BLW = Beginning-of-Line Pixel Clock Wait Count - 1

ELW = End-of-Line Pixel Clock Wait Count - 1

Figure 7-13. Passive Mode End-of-Frame Timing

 

ENB set to 1

 

L_FCLK

 

VSP = 0

 

HSW = 1

VSW = 2

 

 

L_LCLK

 

 

 

ELW = 0

HSP = 0

 

BLW = 0

L_PCLK

 

 

 

PPL = 319

PCP = 1

 

 

LDD[3:0]

Line 239 Data

Line 0 Data

 

LPP = 239

 

ENB - LCD Enable

HSP - Horizontal Sync Polarity

0

- LCD is disabled

0

- Line clock is active high, inactive low

1

- LCD is enabled

1

- Line clock is active low, inactive high

VSP - Vertical Sync Polarity

PCP - Pixel Clock Polarity

0

- Frame clock is active high, inactive low

0

- Pixels sampled from data pins on rising edge of clock

1

- Frame clock is active low, inactive high

1

- Pixels sampled from data pins on falling edge of clock

For PCP = 0 the L_PCLK waveform is inverted, but the timing is identical.

VSW = Vertical Sync Pulse Width - 1

HSW = Horizontal Sync (Line Clock) Pulse Width - 1

BLW = Beginning-of-Line Pixel Clock Wait Count - 1

ELW = End-of-Line Pixel Clock Wait Count - 1

PPL = Pixels Per Line - 1

LPP = Lines Per Panel - 1

Intel® PXA255 Processor Developer’s Manual

7-15

Page 279
Image 279
Intel PXA255 manual Passive Mode Start-of-Frame Timing