Intel PXA255 manual Full Function Uart, Bluetooth Uart, Standard Uart, Compatibility with

UARTs

10.2Overview

Each serial port contains a UART and a slow infrared transmit encoder and receive decoder that conforms to the IRDA Serial Infrared (SIR) Physical Layer Link Specification.

Each UART performs serial-to-parallel conversion on data characters received from a peripheral device or a modem and parallel-to-serial conversion on data characters received from the processor. The processor can read a UART’s complete status during functional operation. Status information includes the type and condition of transfer operations and error conditions (parity, overrun, framing, or break interrupt) associated with the UART.

Each serial port operates in FIFO or non-FIFO mode. In FIFO mode, a 64-byte Transmit FIFO holds data from the processor until it is transmitted on the serial link and a 64-byte Receive FIFO buffers data from the serial link until it is read by the processor. In non-FIFO mode, the transmit and Receive FIFOs are bypassed.

Each UART includes a programmable baud rate generator that can divide the input clock by 1 to (216–1). This produces a 16X clock that can be used to drive the internal transmitter and receiver logic. Software can program interrupts to meet its requirements. This minimizes the number of computations required to handle the communications link. Each UART operates in an environment that is controlled by software and can be polled or is interrupt driven.

10.2.1Full Function UART

The FFUART supports modem control capability. The maximum tested baud rate on this UART is

230.4 kbps. The divisor programmed in the divisor latch registers must be equal to or greater than four.

10.2.2Bluetooth UART

The BTUART is a high speed UART that supports baud rates up to 921.6 kbps and can be connected to a Bluetooth module. It supports the functions in the feature list, (see Section 10.1) but only supports two modem control pins (nCTS, nRTS).

10.2.3Standard UART

The STUART supports all functions in the feature list (see Section 10.1), but does not support modem control capability. The UART’s maximum tested baud rate is 230.4 kbps. The divisors programmed in divisor latch registers must be equal to or greater than four.

10.2.4Compatibility with 16550

The processor UARTs are functionally compatible with the 16550 industry standard. Each UART supports all of the 16550’s functions as well as the following features:

•DMA requests for transmit and receive data services

•Slow infrared asynchronous interface

•Non-Return-to-Zero (NRZ) encoding/decoding function

10-2 Intel® PXA255 Processor Developer’s Manual