Freescale Semiconductor SC140 specifications Control Instructions in Big and Little Endian Modes

Memory Interface

Table 2-30 shows the representation of the change-of-flow instructions in big and little endian modes. In this table, it is assumed that the stack access is to address A0. This shows how the contents of the PC and SR are transferred to/from memory like 32-bit long words.

Table 2-30. Non-Loop Change-of-Flow Instructions in Big and Little Endian Modes

Instruction				Register Operands				Big	Little
								Endian	Endian
BSR								A0 = A	A0 = D
BSRD		31					0	A1 = B	A1 = C
JSR	PC =							A2 = C	A2 = B
			A		B	C	D
JSRD								A3 = D	A3 = A
RTE	SR =		E		F	G	H	A4 = E	A4 = H
RTED								A5 = F	A5 = G
								A6 = G	A6 = F
								A7 = H	A7 = E
RTS		31					0	A0 = A	A0 = D
RTSD								A1 = B	A1 = C
RTSTK	PC =							A2 = C	A2 = B
			A		B	C	D
RTSTKD								A3 = D	A3 = A

Table 2-31 shows the representation of the control instructions in big and little endian modes. In this table, it is assumed that the stack access is to address A0.

Table 2-31. Control Instructions in Big and Little Endian Modes

Instruction			Register Operands				Big	Little
							Endian	Endian
TRAP							A0 = A	A0 = D
ILLEGAL	31					0	A1 = B	A1 = C
	PC =						A2 = C	A2 = B
		A		B	C	D
Interrupt Service							A3 = D	A3 = A
	SR =	E		F	G	H	A4 = E	A4 = H
							A5 = F	A5 = G
							A6 = G	A6 = F
							A7 = H	A7 = E

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2-68 SC140 DSP Core Reference Manual