Freescale Semiconductor SC140 specifications Write to Data Registers, Read from Data Registers

DALU

A special case of the MOVE.L instruction is used for reading from or writing to the EXT portion of a data register. Six variations of this instruction save (restore) the extension bits and Ln bit of data registers to (from) memory. One of the variations writes to memory the Ln bit and extension bits of an even and an odd pair of registers. Another variation reads bits 8:0 from memory to the extension bits and the Ln bit of an even register. Another variation reads bits 24:16 to the extension bits and the Ln bit of an odd register. Memory writes are done from the even/odd pair of registers. Memory reads are done to a single register. An extension saved to memory from an even numbered register must be restored to an even register, likewise for odd registers.

All move instructions are described in detail in Appendix A, “SC140 DSP Core Instruction Set.”

Table 2-2 summarizes the various types of data bus write access to the data registers.

Note: When an unsigned long operand is written to a data register, Dn.e is zero-extended.

Table 2-2. Write to Data Registers

Operand Type	Ln	Dn.e	Dn.h	Dn.l
Fractional word	Zero-extended	Sign-extended	Operand	Zero-filled
Integer Byte	Zero-extended	Zero-extended/	Zero-filled/	Upper byte - Sign-extended/zero-extended
		Sign-extended	Sign-extended	Lower byte - Operand
Integer Word	Zero-extended	Zero-extended/	Zero-filled/	Operand
		Sign-extended	Sign-extended
Long	Zero-extended	Zero-extended/	Operand	Operand
		Sign-extended
2 Extensions - Long	Operand	Operand	Unchanged	Unchanged

Table 2-3 summarizes the various types of data bus read accesses from the data registers.

Table 2-3. Read from Data Registers

Operand Type	Memory Data Bus.h	Memory Data Bus.l	Limiting/Scaling
Fractional Word	-	Dn.h	Yes/No (See Note)
Fractional Long	Dn.h	Dn.l	Yes/No (See Note)
Integer Word	-	Dn.l	No
Integer Long	Dn.h	Dn.l	No
Integer Byte	-	Low byte - Dn.l[7:0]	No
2 Extensions - Long	EXT word: {7 zero bits, Ln+1,	EXT word: {7 zero bits, Ln,	No
	Dn+1.e}	Dn.e}

Note: A fractional word or fractional long word can be written to memory with or without limiting and shifting. See MOVE.F and MOVES.F in Appendix A, “SC140 DSP Core Instruction Set.”

The register file architecture and the 64-bit wide data buses XDBA and XDBB support wide data transfers between the memory and the data registers. Up to four 16-bit words or two 32-bit long words can be transferred between the register file and the memory in a single move operation on each data bus, XDBA or XDBB.

Table 2-4 summarizes the various data widths for data moves from/to the data register file.

SC140 DSP Core Reference Manual 2-9