BMCHG.W

BMCHG.W

Bit-Masked Change a

BMCHG.W

 

16-Bit Operand in Memory (BMU)

 

Operation

Assembler Syntax

 

~(SP-u5)i(SP-u5)i

BMCHG.W #u16,(SP–u5){0 u16 < 216}{0 u5 < 64,W}

(i denotes bits=1 in #u16)

 

 

~(SP+s16)i → (SP+s16)i

BMCHG.W #u16,(SP+s16){0 u16 < 216}{–215s16 < 215,W}

~(Rn)i → (Rn)i

BMCHG.W #u16,(Rn) {0 u16 < 216}

 

~(a16)i → (a16)i

BMCHG.W #u16,(a16) {0 u16 < 216}{0 a16 < 216,W}

Description

These operations use an unsigned 16-bit immediate data mask to invert selected bits in the destination operand. For each bit i that is set (selected) in the mask, the bit i in the corresponding destination operation’s bit position is inverted. These operations read from memory, modify the retrieved value, and write the new value back to that memory address, resulting in two memory accesses. The absolute addresses, offsets, and address register values must be word-aligned.

BMCHG.W #u16,(SP–u5)

Inverts selected bits in the contents of a memory address pointed to by the active stack pointer (SP) with an unsigned 5-bit offset.

BMCHG.W #u16,(SP+s16)

Inverts selected bits in the contents of a memory address pointed to by the active stack pointer (SP) with a signed 16-bit offset.

BMCHG.W #u16,(Rn)

Inverts selected bits in the contents of a memory address pointed to by an address register (Rn).

BMCHG.W #u16,(a16)

Inverts selected bits in the contents of a memory address pointed to by an absolute 16-bit address.

Status and Conditions that Affect Instruction

Register Address

Bit Name

Description

SR[18]

EXP

Determines which stack pointer is used when the stack pointer is an

 

 

operand. Otherwise, the instruction is not affected by SR.

Status and Conditions Changed by Instruction

None.

A-72

SC140 DSP Core Reference Manual

Page 386
Image 386
Freescale Semiconductor SC140 specifications Bmchg.W, Bit-Masked Change a