Freescale Semiconductor SC140 specifications Programming Guidelines, Rule J.1, Rule J.2, Rule J.3

Programming Guidelines

7.7 Programming Guidelines

The rules in this section cannot be detected within the visibility of the assembler and simulator. For example, the assembler and simulator cannot determine if the computed JMP below has a valid COF destination.

Example 7-87. Invalid COF Destination Cannot be Detected

jmp r0	;assembler and simulator cannot determine
	; if COF destination is the start of a VLES

The following rules must be detected by the programmer, and can be avoided by good programming practices. In addition to these rules, some good programming practices are presented below to assist the programmer in writing robust, compatible SC140 code.

Rule J.1

A COF destination must be the start (lowest) address of a VLES. A COF destination cannot jump into the middle of a VLES. This rule applies to all types of COF destinations described in Section 7.4.8, “Change-Of-Flow Destinations.”

Example 7-88. COF Destination in the Middle of a VLES

jmp _dest+2	;not allowed
...	mac d3,d4,d5
_dest mac d0,d1,d2

The assembler evaluates the address of a VLES label as the start (lowest) address of a VLES, regardless of its source position in the VLES. Good programming practice always places COF destination labels before or at the start of a VLES. Programmers should be careful that computed COF destinations are the start of a VLES. This will ensure that rule J.1 is enforced.

Rule J.2

A COF destination cannot be a delay slot.

Example 7-89. COF Destination in a Delay Slot

move.l #_dest,r0

...

jmp r0;not allowed - COF delay slot jmpd _dest2

_dest

add d0,d1,d2

Good programming practice never places COF destination labels before or inside a delay slot VLES. Programmers should be careful that computed COF destinations are not a delay slot. This will ensure that rule J.2 is enforced.

Rule J.3

Code should not be written to rely on the fact that delayed COF instructions and their delay slots are non-interruptible. In order to create non-interruptible sequences, the user should use other mechanisms such as the BMTSET.W instruction or encapsulating the code with the DI and EI instructions. Complying with this rule will help to insure compatibility with future StarCore architectures.

7-48 SC140 DSP Core Reference Manual