Freescale Semiconductor SC140 specifications MOVE.2W, Move.2w d0d1,r0, EA ↔ DaDb

MOVE.2W

MOVE.2W	Move Two Integer Words		MOVE.2W
	to/from a Register Pair (AGU)
Operation	Assembler Syntax
(EA) ↔ Da:Db	MOVE.2W	(EA),Da:Db {0 ≤ EA < 232,L}
	MOVE.2W	Da:Db,(EA) {0 ≤ EA < 232,L}

Description

MOVE.2W (EA),Da:Db

MOVE.2W Da:Db,(EA)

Moves two signed integer words from memory to a data register pair (Da:Db), or from the registers to memory. The effective memory address of the two words is obtained from an address register with an optional offset or post-increment (EA). Each word is stored in the LP of its respective data register.

The first operand (Da) will be moved to or from the lower memory address (EA) and the second operand (Db) will be moved to or from memory address (EA + 2). In order to keep this behavior in both big endian and little endian modes, the core will drive or sample the data bus differently in each mode. See Section 2.4.1, “SC140 Endian Support,” on page 2-56, for more detail on bus and memory behavior for each mode.

The address register values used with this instruction must be a multiple of 4, long word-aligned.

Da

Db

39	16	0
SIGN EXTENSION		(EA)
SIGN EXTENSION		(EA + 2)

Status and Conditions that Affect Instruction

Register Address	Bit Name	Description
MCTL[31:0]	AM3–AM0	Address modification bits when updating R0–R7. Otherwise, the
		instruction is not affected by MCTL.
EMR[16]	BEM	Set if big endian mode, cleared if little endian mode.

Status and Conditions Changed by Instruction

Register Address	Bit Name	Description
Ln	L	Clears the Ln bit in the destination registers.

Example

move.2w d0:d1,(r0)

Register/Memory Address

MCTL

BeforeAfter

$0000 0000

A-258 SC140 DSP Core Reference Manual