Freescale Semiconductor SC140 specifications Integer Move Instructions

Address Generation Unit

Integer moves from memory (byte, word, long, two long) are right-aligned in the destination register, and by default are sign-extended to the left. Unsigned moves are marked with “U” (for example, MOVEU.B), and zero extended in the destination register. A schematic representation of integer moves from memory into a 40-bit register is shown in Figure 2-16. Moves from registers to memory use the appropriate portion from the source register. Moves to registers of less than 40 bits behave the same as in Figure 2-16 up to their bit length.

MOVE.B (signed byte move)

MOVEU.B (unsigned byte move)

MOVEU.W (unsigned word move)

MOVE.W (signed word move)

MOVE.L (signed long move)

MOVEU.L (unsigned long move)

MOVE.2W (signed two word move)

MOVE.2L (signed two long move)

MOVE.4W (signed four-word move)

39				8	0
			sign extension
39				8	0
			zero extension
39		16			0
		zero extension
39		16			0
		sign extension
39		32			0
		sign
	extension
39		32			0
		zero
	extension
39		16			0
		sign extension
		sign extension
39		32			0
		sign
	extension
		sign
	extension
39		16			0
		sign extension
		sign extension
		sign extension
		sign extension

Figure 2-16. Integer Move Instructions

Fractional moves are supported only to DALU registers. Moves from memory are put in the high portion of the data register, sign-extended to the extension, and zero-filled in the low portion. MOVE.L and MOVE.2L may also be considered fractional moves since alignment in the destination register is the same for integer long moves and fractional long moves. A schematic representation of fractional moves from memory to 40-bit data registers is shown in Figure 2-17.

SC140 DSP Core Reference Manual 2-53