Freescale Semiconductor SC140 Upon a trace event, trace the counter value Ecntval, Allowed with

Models: SC140

1 760
Download 760 pages 48.94 Kb
Page 176
Image 176

Trace Unit Registers

In addition, the counter values could be added to the trace package of each trace event, thereby allowing to monitor the elapsed cycles between trace events. The possible counter tracing modes are:

TCOUNT

upon a trace event, trace the counter value (ECNT_VAL)

TCNTEXT

upon a trace event, trace the extension counter value (ECNT_EXT).

 

 

This mode is usefull only with the TCOUNT mode.

Activating the TCOUNT mode adds a 32-bit entry to the traced package upon each trace event. Activating the TCNTEXT mode in addition to the TCOUNT mode adds two 32-bit entries to the trace package upon each trace event.

Both the counter modes cannot be activated with the TEXEC and TMARK mode, in order not to create situations of tracing overflow.

The tracing mode combinations that are allowed are summarized in Table 4-22.

Table 4-22. Allowed tracing mode combinations

Allowed with

TCHOF

TLOOP

TINT

TEXEC

TMARK

 

 

TCOUNT or

Trace mode

 

 

 

 

 

 

 

 

 

 

TCOUNT & TCNTEXT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCHOF

 

+

+

-

-

 

 

+

 

 

 

 

 

 

 

 

 

TLOOP

+

 

+

-

-

 

 

+

 

 

 

 

 

 

 

 

 

TINT

+

+

 

-

-

 

 

+

 

 

 

 

 

 

 

 

 

TEXEC

-

-

-

 

-

 

 

-

 

 

 

 

 

 

 

 

 

TMARK

-

-

-

-

 

 

 

-

 

 

 

 

 

 

 

 

 

When the TB_CTRL register is configured for multiple trace data writes, there is a potential for data loss. This is because each write to the trace buffer requires one core clock cycle. Requesting multiple trace buffer actions such as setting TLOOP, TCOUNT and TCNEXT in TB_CTRL will require a core clock cycle for each write - in this case, four clocks. If a long loop with only three execution sets is encountered with the above TB_CTRL configuration, there are not enough cycles to write all the data. The value of the extension counter register will be lost.

In TB_CTRL configurations where there are not enough core clock cycles to write all requested trace data, the priority for writing data is as follows:

1.Destination and source address

2.Counter value

3.Extension counter value

When using the supported modes, source or destination addresses could not be lost.

When tracing in all modes except TMARK and TEXEC, the LSB of the PC of the source execution set is always 1, while the LSB of all other words in a package is 0. This allows decoding the trace buffer contents when the trace buffer is set to trace different cases, when all programmed information could not be written to the trace buffer at the same time.

4-66

SC140 DSP Core Reference Manual

Page 176
Image 176
Freescale Semiconductor SC140 Upon a trace event, trace the counter value Ecntval, Allowed tracing mode combinations