Core Assembly Syntax with an ISAP

3rd - abs d0 = a core instruction

The syntax defines that the string between the brackets is sent to the ISAP assembler.

One ISAP in a Single-Line VLES

mac d0,d1,d3 {isap_instruction k0,k1,k2 move_special.l k2,(r0)+}

In this example, the MAC instruction is executed by the core and the instructions delimited by the brackets are executed by the ISAP.

One ISAP in a Multi-Line VLES

A VLES spanning multiple lines (parallel execution specified by square bracket delimiters and ISAP instructions specified by curly bracket delimiters):

1 [ mac d0,d2,d4

mac d1,d3,d5

2{isap_instruction k0,k1,k2

3move_special.l k2,(r1)+}

4move.l (r0)+,r2]

In this example, five parallel instruction are executed - three instructions are executed by the core, and two instruction by the ISAP.

line 1: Two MAC instructions executed by the core

line 2: An ISAP instruction with ISAP registers k0,k1 and k2 as arguments

line 3: An ISAP move instruction, storing ISAP register k2 to a memory location pointed by core register r1. The assembler generates an implicit AGU instruction: “move.l d0,(r1)+”. As explained in Section 6.4 ISAP Memory Access, the d0 register is a dummy register which is not driven on the memory data bus, rather the ISAP stores its k2 register by driving the k2 register data on the data bus, and the address is set by the core as (r1).

line 4: A Core move instruction, loading core register r2 from a memory location. Note that loading of R registers in parallel to an ISAP instruction is allowed (unlike D registers).

6.7.1.2 Working with Multiple ISAPs

In this case, each ISAP instruction should be specified by prefixing it with a unique label written before the brackets. This label overrides the default value set with the ISAP_ID_default directive.

The following syntax is used:

ISAP_ID1{ .. ISAP1 instructions .. }

ISAP_ID2{ .. ISAP2 instructions .. }

This method is preferred when multiple ISAP modules are used with the core, and are used interchangeably in the same code section.

In the following example, the two ISAPs that are connected in parallel are a Floating Point ISAP (FP) and an Image Processing ISAP (IP):

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SC140 DSP Core Reference Manual

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Freescale Semiconductor SC140 Working with Multiple ISAPs, One Isap in a Single-Line Vles, One Isap in a Multi-Line Vles