Freescale Semiconductor SC140 specifications Change-Of-Flow Instruction Timing

Instruction Timing

5.3.2 Change-Of-Flow Instruction Timing

The change-of-flow (COF) instructions include branches, jumps, traps, returns, conditional branches, conditional jumps, and loop control instructions that affect the program counter and/or software stack. Program control instructions may affect or be affected by status register bits as specified in the instruction. In the SC140 instruction set naming convention, “jump” signifies instructions using a direct destination address (either absolute or in a register), while “branch” signifies instructions that use a PC-relative offset to specify the destination address.

Jumps and branches to subroutines (JSR/BSR) include implicit push operations to the stack. Similarly, returns from subroutines or exceptions (RTS/RTSTK/RTE) include implicit pop operations from the stack.

COF instructions usually take longer to execute because the pipeline is disrupted during their execution. They are usually most affected by the access time to memory as well as the number of stages in the pipeline. In order to use time more efficiently, most of the COF instructions have a delayed version that enables the execution of one execution set while the pipeline is filling up. The delayed instruction effectively saves one or more cycles over the non-delayed version. The suffix D indicates the delayed version of an instruction, as in JMP and JMPD. For example, JMPD is the delayed version of the JMP instruction.

In Example 5-6, the MOVE.W instruction is logically executed before the delayed jump. The delayed COF instruction JMPD as well as the execution set in the delay slot are a non-interruptible sequence.

Example 5-6. Delayed Change-of-Flow and Its Delay Slot

JMPD	destination_label	;delayed COF
MOVE.W	(R0+N0),D0	;delay slot

COF instructions are of two types - non-loop COF shown in Table 5-6, and loop COF shown in Table 5-7.

Table 5-6. Non-Loop Change-of-Flow Instructions

Instruction	Description
BF	Branch if false
BFD	Branch if false (delayed)
BRA	Branch
BRAD	Branch (delayed)
BSR	Branch to subroutine
BSRD	Branch to subroutine (delayed)
BT	Branch if true
BTD	Branch if true (delayed)
JF	Jump if false
JFD	Jump if false (delayed)
JMP	Jump

SC140 DSP Core Reference Manual 5-17