Freescale Semiconductor SC140 specifications Memory Access Width, Memory Access Misalignment

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Address Generation Unit

2.3.3.5 Memory Access Width

The SC140 core supports variable width access to data memory. With every memory access, the core sends one of four signals to the memory interface to designate whether the access width is 8 bits, 16 bits, 32 bits, or 64 bits wide. The access width is determined by the type of MOVE instruction being used. For example, MOVE.B is used for byte access. MOVE.W is used for word access. For long-word access, MOVE.L, MOVE.2F, and MOVE.2W are used. And, for two long-word access, MOVE.2L, MOVE.4F, and MOVE.4W are used.

The memory addresses are always in units of bytes. For example, addresses for two-word MOVE operations to/from memory are available in multiples of four in order to best align the data with the byte addressing.

Address calculations and register update calculations are performed according to the memory access width as shown in Table 2-18.

Table 2-18. Access Width Support for Address and Register Update Calculations

Addressing Mode

Calculation

 

Memory Access Width

 

 

 

 

 

 

 

 

 

 

 

Byte

Word

Long

Two Long

 

 

 

 

 

 

 

 

 

 

 

 

Post-increment (Rn) +

Rn register post-increment or

1

2

4

8

Post-decrement (Rn) -

post-decrement by —>

 

 

 

 

 

 

 

 

 

 

Post-increment by

Rn register post-increment by ->

Ni*1

Ni*2

Ni*4

Ni*8

Offset (Rn)+Ni

 

 

 

 

 

 

 

 

 

 

 

Indexed by Offset N0

Actual address offset

N0

2*N0

4*N0

8*N0

(Rn + N0)

 

 

 

 

 

 

 

 

 

 

 

Indexed by Address

Actual address offset

Rm

2*Rm

4*Rm

8*Rm

Register Rm (Rn + Rm)

 

 

 

 

 

 

 

 

 

 

 

Short Displacement

Actual address displacement

x

x

x

x

(Rn + x)

 

 

 

 

 

 

 

 

 

 

 

Word Displacement

Actual address displacement

xxxx

xxxx

xxxx

xxxx

(Rn + xxxx)

 

 

 

 

 

 

 

 

 

 

 

SP update in Push/Pop

SP post-increment or

8

8

8

8

 

pre-decrement by —>

 

 

 

 

 

 

 

 

 

 

SP Short Displacement

Actual address displacement

NA

xx

xx

NA

(SP - xx)

 

 

 

 

 

 

 

 

 

 

 

SP Word Displacement

Actual address displacement

xxxx

xxxx

xxxx

xxxx

 

 

 

 

 

 

2.3.3.6 Memory Access Misalignment

Each access to the memory generated by the core should be aligned according to the access type. If the alignment rule is violated, erroneous data may be fetched from the memory. In addition, an exception may be generated to identify that an unaligned access occurred. For more information, see Section 5.8, “Exception Processing,” on page 5-46.

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SC140 DSP Core Reference Manual

Page 74
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Freescale Semiconductor SC140 specifications Memory Access Width, Memory Access Misalignment