DALU
SC140 DSP Core Reference Manual 2-11
DECEQ Decrement a data register and set T (the true bit) if zero
DECGE Decrement a data register and set T if greater than or equal to zero
DIV Divide iteration
DMACSS Multiply signed by signed and accumulate with data register
right-shifted by word size
DMACSU Multiply signed by unsigned and accumulate with data register
right-shifted by word size
IADDNC.W 40-bit non-saturating add integers with immediate, no carry update
IMAC Multiply-accumulate integers
IMACLHUU Multiply-accumulate unsigned integers:
first source from low portion, second from high portion
IMACUS Multiply-accumulate unsigned integer and signe d integer
IMPY.W Multiply integer
IMPYHLUU Multiply unsigned integer and unsigned integer:
first source from high portion, second from low portion
IMPYSU Multiply signed integer and unsigned integer
IMPYUU Multiply unsigned integer and unsigned integer
INC Increment a data register
INC.F Increment a data register (as fractional data)
MAC Multiply-accumulate signed fractions
MACR Multiply-accumulate signed fractions and round
MACSU Multiply-accumulate signed fraction and unsigned fraction
MACUS Multipl y -accumulate unsigned fraction and signed fractio n
MACUU Multiply-accumulate unsigned fraction and unsigned fraction
MAX Transfer maximum signed value
MAX2 Transfer two 16-bit maximu m signed values
MAX2VIT Transfer two 16-bit maximum sign ed values, update Viterbi flags
MAXM Transfer maximum magnitude value
MIN Transfer minimum signed value
MPY Multiply signed fractions
MPYR Multiply signed fractions and round
MPYSU Multiply signed fraction and unsigned fraction
MPYUS Multiply unsigned fraction and signed fraction
MPYUU Multiply unsigned fraction and unsigned fraction
Table 2-5. DALU Arithmetic Instructions (MAC) (Continued)
Instruction Description