Freescale Semiconductor SC140 specifications List of Tables

List of Tables

2-1	DALU Programming Model	. 2-7
2-2	Write to Data Registers	. 2-9
2-3	Read from Data Registers	. 2-9
2-4	Data Registers Access Width	2-10
2-5	DALU Arithmetic Instructions (MAC)	2-10
2-6	DALU Logical Instructions (BFU)	2-13
2-7	Scaling Example	2-14
2-8	Ln Bit Calculation	2-15
2-9	Limiting Example	2-16
2-10	Scaling and Limiting Interactions	2-16
2-11	Saturation and Rounding Interactions	2-17
2-12	Two’s Complement Word Representations	2-19
2-13	Rounding Position in Relation to Scaling Mode	2-21
2-14	Arithmetic Saturation Example	2-25
2-15	Fractional Signed and Unsigned Two’s Complement Multiplication	2-26
2-16	Integer Signed and Unsigned Two’s Complement Multiplication	2-28
2-17	Address Modifier (AM) Bits	2-37
2-18	Access Width Support for Address and Register Update Calculations	2-42
2-19	Memory Address Alignment	2-43
2-20	Addressing Modes Summary	2-43
2-21	Modulo Register Values for Modulo Addressing Mode	2-47
2-22	Modulo Register Values for Wrap-Around Modulo Addressing Mode	2-48
2-23	AGU Arithmetic Instructions	2-48
2-24	AGU Bit Mask Instructions (BMU)	2-50
2-25	AGU Move Instructions	2-52
2-26	Data Representation in Memory	2-58
2-27	Move Instructions in Big and Little Endian Modes	2-64
2-28	Stack Support Instructions in Big and Little Endian Modes	2-67
2-29	Bit Mask Instructions in Big and Little Endian Modes	2-67
2-31	Control Instructions in Big and Little Endian Modes	2-68
2-30	Non-Loop Change-of-Flow Instructions in Big and Little Endian Modes . . . .	2-68
3-1	Status Register Description	. 3-2
3-2	EMR Description	. 3-8
4-1	JTAG Interface Signal Descriptions	. 4-2

SC140 DSP Core Reference Manual xv