ADDL1A

Instruction Formats and Opcodes

Instruction

Words

Cycles

Type

ADDL1A rx,Rx

1

1

2

Opcode

158 70

1 1 1 0 R R R R 0 0 0 0 r r r r

Instruction Fields

rx

rrrr

 

 

AGU Source Register

 

 

 

 

0000

N0

0100

1000

R0

1100

R4

 

 

 

 

 

 

 

 

 

 

0001

N1

0101

1001

R1

1101

R5

 

 

 

 

 

 

 

 

 

 

0010

N2

0110

PC

1010

R2

1110

R6

 

 

 

 

 

 

 

 

 

 

0011

N3

0111

SP

1011

R3

1111

R7

 

 

 

 

 

 

 

 

Note:

This instruction

can specify R8-R15 as operands by using a high register prefix.

 

Rx

RRRR

 

AGU Source/Destination Register

 

 

 

0000

N0

0100

1000

R0

1100

R4

 

 

 

 

 

 

 

 

 

 

0001

N1

0101

1001

R1

1101

R5

 

 

 

 

 

 

 

 

 

 

0010

N2

0110

1010

R2

1110

R6

 

 

 

 

 

 

 

 

 

 

0011

N3

0111

SP

1011

R3

1111

R7

 

 

 

 

 

 

 

 

Note:

This instruction

can specify R8-R15 as operands by using a high register prefix.

 

SC140 DSP Core Reference Manual

A-33

Page 347
Image 347
Freescale Semiconductor SC140 specifications ADDL1A rx,Rx